A cache is a relatively high-speed, small, local memory which is used to provide a local storage for frequently accessed memory locations of a larger, relatively slow, main memory. By storing the information or a copy of the information locally, the cache is able to intercept memory references and handle them directly without transferring the request to the main memory over the system bus. The result is lower traffic on the memory bus and decreased latency on the local bus to the requesting processor. In a multiprocessing system, the use of a cache also increases potential systems' performance by reducing each processor's demand for system bus bandwidth, thus allowing more processors in the system.
It is advantageous to have a single cache and cache directory which is shared by a number of processors. In very large scale integration (VLSI) systems it is also advantageous to be able to configure the cache so that it can handle one, two, or more processors, depending upon the configuration of the system.
It is therefore an object of the present invention to provide a cache directory and control which can be split into two or more logical directories, for controlling requests from two or more processors.
It is also an object of this invention to provide a prefetch buffer and control for the prefetch buffer that will enable the buffer to be split into two or more logical channels for handling cache prefetches associated with requests from two or more processors.